# 21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber

**Type:** Papers  
**Canonical URL:** https://scholariq.org/papers/21-7-a-500mw-digitally-calibrated-afe-in-65nm-cmos-for-10gb-s-serial-links-over/

## Facts

| Field | Value |
| --- | --- |
| Author Names | Jun Cao,Bo Zhang,Ullas Singh,Delong Cui,A. Vasani,Anubhav Garg,Wei Zhang,Namik Kocaman,Deyi Pi,Balaji Raghavan,Hui Pan,Ichiro Fujimori,Afshin Momtaz |
| Citations | 42 |
| DOI | 10.1109/isscc.2009.4977462 |
| Fields | Engineering |
| Open Access | false |
| OA Status | closed |
| OpenAlex ID | https://openalex.org/W2125723800 |
| Type | conference-paper |
| Year | 2009 |

## Paper authors

- [Anubhav Garg](https://scholariq.org/researchers/anubhav-garg/)

## Paper primary topic

- [Advancements in PLL and VCO Technologies](https://scholariq.org/topics/advancements-in-pll-and-vco-technologies/)

## Paper topics

- [Advancements in PLL and VCO Technologies](https://scholariq.org/topics/advancements-in-pll-and-vco-technologies/)
- [Optical Network Technologies](https://scholariq.org/topics/optical-network-technologies/)
- [Photonic and Optical Devices](https://scholariq.org/topics/photonic-and-optical-devices/)

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Source: ScholarIQ — public research metadata, principally OpenAlex. See https://scholariq.org/sources/ for provenance and https://scholariq.org/methodology/ for what these figures mean.