# A New FPGA Packing Algorithm Based on the Modeling Method for Logic Block

**Type:** Papers  
**Canonical URL:** https://scholariq.org/papers/a-new-fpga-packing-algorithm-based-on-the-modeling-method-for-logic-block/

## Facts

| Field | Value |
| --- | --- |
| Author Names | Gang Ni,Jiarong Tong,Jinmei Lai |
| Citations | 8 |
| DOI | 10.1109/icasic.2005.1611445 |
| Fields | Computer Science,Engineering |
| Open Access | false |
| OA Status | closed |
| OpenAlex ID | https://openalex.org/W2540066750 |
| Type | conference-paper |
| Year | 2006 |

## Paper authors

- [Jiarong Tong](https://scholariq.org/researchers/jiarong-tong/)

## Paper primary topic

- [VLSI and FPGA Design Techniques](https://scholariq.org/topics/vlsi-and-fpga-design-techniques/)

## Paper topics

- [VLSI and FPGA Design Techniques](https://scholariq.org/topics/vlsi-and-fpga-design-techniques/)
- [Embedded Systems Design Techniques](https://scholariq.org/topics/embedded-systems-design-techniques/)
- [VLSI and Analog Circuit Testing](https://scholariq.org/topics/vlsi-and-analog-circuit-testing/)

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Source: ScholarIQ — public research metadata, principally OpenAlex. See https://scholariq.org/sources/ for provenance and https://scholariq.org/methodology/ for what these figures mean.