# An Architecture of a True Single Phase Clock D Flip-flop utilizing 45nm Technology

**Type:** Papers  
**Canonical URL:** https://scholariq.org/papers/an-architecture-of-a-true-single-phase-clock-d-flip-flop-utilizing-45nm/

## Facts

| Field | Value |
| --- | --- |
| Author Names | N. Shantha Kumar,Alka Verma |
| Citations | 3 |
| DOI | 10.1109/icatiece56365.2022.10046670 |
| Fields | Engineering |
| Open Access | false |
| OA Status | closed |
| OpenAlex ID | https://openalex.org/W4321843896 |
| Type | conference-paper |
| Year | 2022 |

## Paper authors

- [Alka Verma](https://scholariq.org/researchers/alka-verma/)

## Paper primary topic

- [Low-power high-performance VLSI design](https://scholariq.org/topics/low-power-high-performance-vlsi-design/)

## Paper topics

- [Low-power high-performance VLSI design](https://scholariq.org/topics/low-power-high-performance-vlsi-design/)
- [Analog and Mixed-Signal Circuit Design](https://scholariq.org/topics/analog-and-mixed-signal-circuit-design/)
- [Advancements in PLL and VCO Technologies](https://scholariq.org/topics/advancements-in-pll-and-vco-technologies/)

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Source: ScholarIQ — public research metadata, principally OpenAlex. See https://scholariq.org/sources/ for provenance and https://scholariq.org/methodology/ for what these figures mean.