# hp32nmノード以降に向けた周辺回路がBulk Planar FET及びメモリセルがBulk-FinFETで構成されたSRAM技術について(VLSI回路,デバイス技術(高速,低電圧,低消費電力))

**Type:** Papers  
**Canonical URL:** https://scholariq.org/papers/hp32nm-bulk-planar-fet-bulk-finfet-sram-vlsi/

## Facts

| Field | Value |
| --- | --- |
| Author Names | 博久 川崎,聡 稲葉,王俊 岡野,明生 金子,淳史 八木下,貴士 泉田,貴永 金村,貴彦 佐々木,伸朗 大塚,伸俊 青木,恭一 須黒,和弘 江口,祥隆 綱島,一成 石丸,秀美 石内 |
| Citations | 0 |
| Fields | Computer Science,Engineering |
| Open Access | false |
| OA Status | closed |
| OpenAlex ID | https://openalex.org/W1520449808 |
| Type | conference-paper |
| Year | 2006 |

## Paper authors

- [聡 稲葉](https://scholariq.org/researchers/a5078186687/)

## Paper journal

- [SIAM International Conference on Data Mining](https://scholariq.org/journals/siam-international-conference-on-data-mining/)

## Paper primary topic

- [Network Packet Processing and Optimization](https://scholariq.org/topics/network-packet-processing-and-optimization/)

## Paper topics

- [Network Packet Processing and Optimization](https://scholariq.org/topics/network-packet-processing-and-optimization/)
- [Advancements in Semiconductor Devices and Circuit Design](https://scholariq.org/topics/advancements-in-semiconductor-devices-and-circuit-design/)
- [Ferroelectric and Negative Capacitance Devices](https://scholariq.org/topics/ferroelectric-and-negative-capacitance-devices/)

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Source: ScholarIQ — public research metadata, principally OpenAlex. See https://scholariq.org/sources/ for provenance and https://scholariq.org/methodology/ for what these figures mean.