# Advancements in PLL and VCO Technologies

**Type:** Topics  
**Canonical URL:** https://scholariq.org/topics/advancements-in-pll-and-vco-technologies/

## Facts

| Field | Value |
| --- | --- |
| Description | This cluster of papers focuses on the design, analysis, and optimization of phase-locked loops (PLLs) and related components in high-speed circuits. Topics include frequency synthesizers, time-to-digital converters, jitter analysis, digital PLLs, charge pumps, clock recovery techniques, delta-sigma modulators, and their application in high-speed communication systems. |
| Domain | Physical Sciences |
| Field | Engineering |
| OpenAlex ID | t11417 |
| Works | 19 |

## Topic papers all

Showing 15 of 19.

- [A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS](https://scholariq.org/papers/a-28-gb-s-560-mw-multi-standard-serdes-with-single-stage-analog-front-end-and-14/)
- [A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer With a Time-Windowed Time-to-Digital Converter](https://scholariq.org/papers/a-2-1-to-2-8-ghz-low-phase-noise-all-digital-frequency-synthesizer-with-a-time/)
- [A 1.0625 $\sim$ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS](https://scholariq.org/papers/a-1-0625-sim-14-025-gb-s-multi-media-transceiver-with-full-rate-source-series/)
- [A Widely-Tunable, Reconfigurable CMOS Analog Baseband IC for Software-Defined Radio](https://scholariq.org/papers/a-widely-tunable-reconfigurable-cmos-analog-baseband-ic-for-software-defined/)
- [21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber](https://scholariq.org/papers/21-7-a-500mw-digitally-calibrated-afe-in-65nm-cmos-for-10gb-s-serial-links-over/)
- [A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-<tex>$muhbox m$</tex>SiGe BiCMOS Technology](https://scholariq.org/papers/a-1-tap-40-gb-s-look-ahead-decision-feedback-equalizer-in-0-18-and-lt-tex-and-gt/)
- [2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS](https://scholariq.org/papers/2-1-28gb-s-560mw-multi-standard-serdes-with-single-stage-analog-front-end-and-14/)
- [Impulse invariance-based method for the computation of fractional integral of order](https://scholariq.org/papers/impulse-invariance-based-method-for-the-computation-of-fractional-integral-of/)
- [A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS](https://scholariq.org/papers/a-1-0625-to-14-025gb-s-multimedia-transceiver-with-full-rate-source-series/)
- [Power Measurements in DVB-T Systems: New Proposal for Enhancing Reliability and Repeatability](https://scholariq.org/papers/power-measurements-in-dvb-t-systems-new-proposal-for-enhancing-reliability-and/)
- [A 2.1-to-2.8GHz all-digital frequency synthesizer with a time-windowed TDC](https://scholariq.org/papers/a-2-1-to-2-8ghz-all-digital-frequency-synthesizer-with-a-time-windowed-tdc/)
- [Third order quadrature oscillator and its application using CDBA](https://scholariq.org/papers/third-order-quadrature-oscillator-and-its-application-using-cdba/)
- [Electronically tunable higher-order quadrature oscillator employing CDBA](https://scholariq.org/papers/electronically-tunable-higher-order-quadrature-oscillator-employing-cdba/)
- [A 0.24-<i>μ</i>V-Input-Ripple 8-<i>μ</i>V-Input-Offset 10-MHz Chopper Operational Amplifier Employing MOS-DAC-Based Offset Calibration](https://scholariq.org/papers/a-0-24-i-i-v-input-ripple-8-i-i-v-input-offset-10-mhz-chopper-operational/)
- [Second Order Universal Filter Using Four Terminal Floating Nullor (FTFN)](https://scholariq.org/papers/second-order-universal-filter-using-four-terminal-floating-nullor-ftfn/)

## Topic primary papers

- [A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS](https://scholariq.org/papers/a-28-gb-s-560-mw-multi-standard-serdes-with-single-stage-analog-front-end-and-14/)
- [A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer With a Time-Windowed Time-to-Digital Converter](https://scholariq.org/papers/a-2-1-to-2-8-ghz-low-phase-noise-all-digital-frequency-synthesizer-with-a-time/)
- [A 1.0625 $\sim$ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS](https://scholariq.org/papers/a-1-0625-sim-14-025-gb-s-multi-media-transceiver-with-full-rate-source-series/)
- [21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber](https://scholariq.org/papers/21-7-a-500mw-digitally-calibrated-afe-in-65nm-cmos-for-10gb-s-serial-links-over/)
- [A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-&lt;tex&gt;$muhbox m$&lt;/tex&gt;SiGe BiCMOS Technology](https://scholariq.org/papers/a-1-tap-40-gb-s-look-ahead-decision-feedback-equalizer-in-0-18-and-lt-tex-and-gt/)
- [2.1 28Gb/s 560mW multi-standard SerDes with single-stage analog front-end and 14-tap decision-feedback equalizer in 28nm CMOS](https://scholariq.org/papers/2-1-28gb-s-560mw-multi-standard-serdes-with-single-stage-analog-front-end-and-14/)
- [A 1.0625-to-14.025Gb/s multimedia transceiver with full-rate source-series-terminated transmit driver and floating-tap decision-feedback equalizer in 40nm CMOS](https://scholariq.org/papers/a-1-0625-to-14-025gb-s-multimedia-transceiver-with-full-rate-source-series/)
- [A 2.1-to-2.8GHz all-digital frequency synthesizer with a time-windowed TDC](https://scholariq.org/papers/a-2-1-to-2-8ghz-all-digital-frequency-synthesizer-with-a-time-windowed-tdc/)
- [An Optimized 90nm CMOS PLL with Reduced Power Consumption and Locking Time](https://scholariq.org/papers/an-optimized-90nm-cmos-pll-with-reduced-power-consumption-and-locking-time/)

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Source: ScholarIQ — public research metadata, principally OpenAlex. See https://scholariq.org/sources/ for provenance and https://scholariq.org/methodology/ for what these figures mean.