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A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets

PaperCitations, authors & open-access status

A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets is a paper indexed in ScholarIQ from OpenAlex.

How many citations does A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets have?

ScholarIQcitation count

A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets has 139 citations in the OpenAlex counts ScholarIQ stores.

When was A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets published?

ScholarIQyear

A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets has 2016 year in the ScholarIQ index.

What is the open-access status of A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets?

ScholarIQoa status

A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets has closed oa status in the ScholarIQ index.

What is the DOI of A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets?

ScholarIQdoi

The DOI for A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets is on the source record.

What is the OpenAlex record for A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets?

ScholarIQopenalex

The OpenAlex for A Highly Reliable Memory Cell Design Combined With Layout-Level Approach to Tolerant Single-Event Upsets is on the source record.

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