ScholarIQanswers from OpenAlex
Advancements in PLL and VCO Technologies
TopicLeading institutions, researchers & key papers
Advancements in PLL and VCO Technologies is a topic indexed in ScholarIQ from OpenAlex.
What is known about Advancements in PLL and VCO Technologies?
ScholarIQrecord summary
This cluster of papers focuses on the design, analysis, and optimization of phase-locked loops (PLLs) and related components in high-speed circuits. Topics include frequency synthesizers, time-to-digital converters, jitter analysis, digital PLLs, charge pumps, clock recovery techniques, delta-sigma modulators, and their application in high-speed communication systems.
How many works does Advancements in PLL and VCO Technologies have?
ScholarIQindexed works
Advancements in PLL and VCO Technologies has 19 works in the ScholarIQ index. The count is the OpenAlex total, not the number of papers listed on this page.
What is the OpenAlex record for Advancements in PLL and VCO Technologies?
ScholarIQopenalex
The OpenAlex for Advancements in PLL and VCO Technologies is on the source record.
What are the most-cited papers on Advancements in PLL and VCO Technologies?
ScholarIQmost cited works
A 28 Gb/s 560 mW Multi-Standard SerDes With Single-Stage Analog Front-End and 14-Tap Decision Feedback Equalizer in 28 nm CMOS
Hiroshi Kimura, Pervez Aziz, Tai Jing, Ashutosh Kumar Sinha, Shiva Prasad Kotagiri, Ram Narayan, Hairong Gao, Ping Jing, Gary Hom, Anshi Liang, Eric Zhang, Aniket Kadkol, Ruchi Kothari, Gordon Chan, Yehui Sun, Benjamin Ge, Jason Zeng, Kathy Ling, Michael Cai Wang, Amaresh V. Malipatil, Lijun Li, Christopher J. Abel, Freeman Zhong
A 2.1-to-2.8-GHz Low-Phase-Noise All-Digital Frequency Synthesizer With a Time-Windowed Time-to-Digital Converter
Takashi Tokairin, Mitsuji Okada, Masaki Kitsunezuka, Tadashi Maeda, M. Fukaishi
A 1.0625 $\sim$ 14.025 Gb/s Multi-Media Transceiver With Full-Rate Source-Series-Terminated Transmit Driver and Floating-Tap Decision-Feedback Equalizer in 40 nm CMOS
Freeman Zhong, Shaolei Quan, Wing Liu, Pervez Aziz, Tai Jing, Jen Dong, C. Desai, Hairong Gao, Monica Garcia, Gary Hom, Tony Huynh, Hiroshi Kimura, Ruchi Kothari, Lijun Li, Xiaoyue Cathy Liu, Scott Lowrie, Kathy Ling, Amaresh V. Malipatil, Ram Narayan, Tom Prokop, Chai Palusa, Anil Rajashekara, Ashutosh Kumar Sinha, Charlie Zhong, Eric Zhang
21.7 A 500mW digitally calibrated AFE in 65nm CMOS for 10Gb/s Serial links over backplane and multimode fiber
Jun Cao, Bo Zhang, Ullas Singh, Delong Cui, A. Vasani, Anubhav Garg, Wei Zhang, Namik Kocaman, Deyi Pi, Balaji Raghavan, Hui Pan, Ichiro Fujimori, Afshin Momtaz
A 1-Tap 40-Gb/s Look-Ahead Decision Feedback Equalizer in 0.18-<tex>$muhbox m$</tex>SiGe BiCMOS Technology
Anubhav Garg, Anthony Chan Carusone, Sorin P. Voinigescu
Where is Advancements in PLL and VCO Technologies research published, and who funds it?
ScholarIQvenues & funding sources
TOP JOURNALS
TOP FUNDERS
National Science Foundation—
NIH—
Wellcome Trust—
European Research Council—
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How much of the research on Advancements in PLL and VCO Technologies is open access?
ScholarIQopen access share
11%OPEN ACCESS