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Michel Tollenaere
ResearcherPublications, citations & collaboration network
Michel Tollenaere is a researcher indexed in ScholarIQ from OpenAlex & ORCID. ScholarIQ records 98 works, 748 citations, an h-index of 13 and an i10-index of 16.
98
Works
748
Citations
13
h-index
16
i10-index
IDs:OpenAlex
How has Michel Tollenaere's publication output changed over time?
ScholarIQpublication output · 1995–2023
Output grew0% over the shown period — from 1 works in 1995 to 1 in 2023.
1
3
1
1
1
1
1
1
1
199520032005200820112014201520212023
What are the most-cited papers on Michel Tollenaere?
ScholarIQmost cited works
Modular and platform methods for product family design: literature analysis
José Alberto, Michel Tollenaere
Journal of Intelligent Manufacturing. 2005296 Citations
Dynamic risk management unveil productivity improvements
Aymen Mili, Samuel Bassetto, Ali Siadat, Michel Tollenaere
S97378760. 200854 Citations
Product information systems engineering: an approach for building product models by reuse of patterns
Lilia Gzara, Dominique Rieu, Michel Tollenaere
Robotics and Computer-Integrated Manufacturing. 200334 Citations
Defining and Measuring Supply Chain Performance: A Systematic Literature Review
Fatma Lehyani, Alaeddine Zouari, Ahmed Ghorbel, Michel Tollenaere
Engineering Management Journal. 202130 Citations
Simulation-based optimization of sampling plans to reduce inspections while mastering the risk exposure in semiconductor manufacturing
M’hammed Sahnoun, Belgacem Bettayeb, Samuel-Jean Bassetto, Michel Tollenaere
Journal of Intelligent Manufacturing. 201427 Citations
Related on ScholarIQ
Institut polytechnique de Grenoble
Institution
Modular and platform methods for product family design: literature analysis
Paper
Dynamic risk management unveil productivity improvements
Paper
Product information systems engineering: an approach for building product models by reuse of patterns
Paper
Defining and Measuring Supply Chain Performance: A Systematic Literature Review
Paper
Simulation-based optimization of sampling plans to reduce inspections while mastering the risk exposure in semiconductor manufacturing
Paper